The present invention relates to semiconductor devices and manufacturing methods thereof and more particularly to technology useful for semiconductor devices which have vias penetrating a semiconductor substrate.
A Through-Silicon Via (TSV) is known as a means to electrically couple different types of devices in a three-dimensional multifunctional device manufactured by vertically stacking different types of devices such as memory devices, logic devices or MEMS (Micro Electro Mechanical Systems) chips.
A through-silicon via is associated with a technique of making a via electrode which penetrates a semiconductor substrate. The methods of making such a via include a via middle method in which a through-silicon via is made in the course of formation of an LSI (Large Scale Integration).
Japanese Unexamined Patent Publication No. 2010-166052 describes that a liner insulating film covering the sidewall of a through-silicon via penetrating a semiconductor substrate is left as part of an interlayer film. It is described there that the liner insulating film is a TEOS (Tetra Ethyl Ortho Silicate) film.
Japanese Unexamined Patent Publication No. 2010-205990 describes that a via hole is made by etching the back surface of a semiconductor substrate and copper film is buried in the via hole to form a through via.
Japanese Unexamined Patent Publication No. 2005-210048 describes that a plug is formed in a hole penetrating a semiconductor substrate, through an insulating film as a TEOS film with a thickness of about 1 μm and the insulating film is left on the main surface of the semiconductor substrate.